1. Technical Field
Various embodiments described herein relate generally to a semiconductor apparatus, and more particularly, to a circuit and method for generating a reference voltage, a phase change random access memory apparatus and a read method.
2. Related Art
A phase change random access memory (PCRAM) apparatus is a nonvolatile memory apparatus that stores data by changing the state of a phase change material. The level of integration per unit area of a memory apparatus can be increased by storing multi-level data in a PCRAM apparatus. In order to implement a multi-level PCRAM apparatus, the state of the phase change material must be accurately controlled.
A typical phase change material has a low resistance in a crystalline state, but high resistance in an amorphous state. Further, in the amorphous state the resistance value of the phase change material increases as time passes.
FIG. 1 is a graph illustrating resistance characteristics of a phase change material with respect to time.
In FIG. 1, in the set state, that is, when the phase change material is at the crystalline state, it can be seen that the resistance value is maintained substantially at the same level, even as time passes. However, in the reset state, that is, when the phase change material is at the amorphous state, it can be seen that the resistance of the phase change material gradually increases as time passes.
FIG. 2 is a graph illustrating resistance distribution with respect to time in a multi-level PCRAM apparatus.
When a PCRAM apparatus is configured to have multiple levels, for example, to store 2 bit data, the resistance value can be controlled such that the phase change random access memory (PCRAM) cell has 00, 01, 10, and 11 data, in which the resistance value of the phase change material increases in the order of 00, 01, 10, and 11.
When the PCRAM cell stores 00 or 01 data, the phase change material has a lower resistance, and the resistance value does not substantially change even as time passes (A, B).
On the contrary, when the PCRAM cell stores 10 or 11 data, the phase change material is at a higher resistance state, and the resistance tends to shift so that the resistance value of the phase change material increases as time passes (C, D).
FIG. 3 illustrates resistance shift in a PCRAM apparatus.
In FIG. 3, A indicates 00 data, B indicates 01 data, C indicates 10 data, and D indicates 11 data, and the resistance increases in the order of 00, 01, 10, and 11.
When four level data is written to each memory cell, a resistance shift in which the resistance of the phase change material storing the data 10 and 11 having a higher resistance state increases will occur as time passes. That is, in FIG. 3, as time passes, the resistance value of the phase change material where the 10 data C or 11 data D is written increases (C′, D′).
The larger the number of storable data, the more the resistance shift becomes problematic when determining the state of the PCRAM cell.
For example, in a multi-level memory device, when data stored in a cell is read, predetermined bias voltages ‘VBIAS1’, ‘VBIAS2’, and ‘VBIAS3’ that increase or decrease in stages (FIG. 3) are applied to a sensing node, and then the data stored in the cells are read by comparing the voltage of the sensing node to a reference voltage. However, when there is resistance shift, the voltage outputted as the result obtained by sensing the cell data is shifted when the bias voltages are applied, and this shifted voltage is compared to a predetermined reference voltage, and thus the read operations may not be performed accurately.
Further, it is difficult to ensure a sensing margin between multi-level data, whereby undesired data may be read and the reliability of the read operation cannot be ensured.